/**
 @file ctc_greatbelt_packet.c

 @author  Copyright (C) 2012 Centec Networks Inc.  All rights reserved.

 @date 2012-11-25

 @version v2.0

 This file define ctc functions

 \p The packet module is used for communication protocol packets between CPU and Greatbelt.
 \p There are two transport mode for packet: DMA or Ethernet.
 \p Greatbelt will encapsulate CPUMAC (20B) + Packet (32B) for Ethernet mode.
 \p Greatbelt will encapsulate Packet (32B) for DMA mode.

                                            CPUMAC Header
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
   |           3           |           2           |           1           |           0           |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
   |31|30|29|28|27|26|25|24|23|22|21|20|19|18|17|16|15|14|13|12|11|10|09|08|07|06|05|04|03|02|01|00|
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 0 |                                                                                               |
   +                      MACDA                    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 4 |                                               |                                               |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+                      MACSA                    +
 8 |                                                                                               |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 C |                                              VLAN                                             |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
10 |                      Type                     |                   Reserved                    |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

                                            Packet Header
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
   |           3           |           2           |           1           |           0           |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
   |31|30|29|28|27|26|25|24|23|22|21|20|19|18|17|16|15|14|13|12|11|10|09|08|07|06|05|04|03|02|01|00|
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 0 | 34  |     24 packetOffset   |                                5 destMap                        |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 4 |    27 priority  |   25   |   33   |41|   11   |15|38|               37 sourcePort             |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 8 |           43 srcVlanId            |  2  |0 |                    20 nextHopPtr                 |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 C |14|3 | 31 rxtxFcl22_17 |       7 flow          |         48 ttl        |9 |1 |35|17|10headerCrc|
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
10 |       36        |   26   |46|32|19|21|8 | 47  | 45  |42|39|           40 srcCvlanId           |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
14 |                   44 srcVlanPtr               |                      6 fid                    |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
18 |                  16 logicSrcPort              |30|4 | 29  | 18  |22|28|   23   |      12      |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
1C |                                            13 ipSa                                            |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+


 | FldID | Word | Bit | BitLen | Name                     | Description                                                                                |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 0     | 2    | 17  | 1      | bridgeOperation          | Not care                                                                                   |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 1     | 3    | 6   | 1      | bypassIngressEdit        | TBD                                                                                        |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 2     | 2    | 18  | 2      | color                    | Color of the packet [0-3]                                                                  |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 3     | 3    | 30  | 1      | criticalPacket           | If set, indicates that this is a critical packet and should not be dropped                 |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 4     | 6    | 14  | 1      | cutThrough               | If set, cut through mode is enabled                                                        |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 5     | 0    | 0   | 22     | destMap                  | destMap[21]/mast; destMap[20:16]/destChipId[4:0]; destMap[15:0]/mcastId[15:0](mcast is 1)/ucastId[15:0](mcast is 0) |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 6     | 5    | 0   | 16     | fid                      | vrfid/ptpTimestamp[41:26]/dmTimestamp[33:18]/rxFcb[31:16]/fid[13:0], etc                   |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 7     | 3    | 16  | 8      | flow                     | flowId[3:0]                                                                                |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 8     | 4    | 18  | 1      | fromCpuOrOam             | Not care                                                                                   |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 9     | 3    | 7   | 1      | fromFabric               | Not care                                                                                   |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 10    | 3    | 0   | 4      | headerCrc                | CRC-4 of total 32 bytes length Bridge Header                                               |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 11    | 1    | 16  | 3      | headerHash2_0            | headerHash[2:0] : Hash value to decide on link aggregation destination                     |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 12    | 6    | 0   | 5      | headerHash7_3            | headerHash[7:3] : Hash value to decide on link aggregation destination                     |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 13    | 7    | 0   | 32     | ipSa                     | ipSa[31:0]/txFcb[31:0]/ptpTimestamp[21:0]                                                  |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 14    | 3    | 31  | 1      | lengthAdjustType         | TBD                                                                                        |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 15    | 1    | 15  | 1      | logicPortType            | If set, indicates that the source port is a tunnel/uplink port                             |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 16    | 6    | 16  | 16     | logicSrcPort             | logicSrcPort[13:0]/dmTimestamp[17:2]/rxFcb[15:0]                                           |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 17    | 3    | 4   | 1      | loopbackDiscard          |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 18    | 6    | 10  | 2      | muxLengthType            |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 19    | 4    | 20  | 1      | nextHopExt               | If set, indicate that DsNextHop8W is used                                                  |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 20    | 2    | 0   | 17     | nextHopPtr               | RX: cpu rx reason                                                                          |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 21    | 4    | 19  | 1      | nonCrc                   |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 22    | 6    | 9   | 1      | oamTunnelEn              | If set, OAM tunnel is enabled                                                              |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 23    | 6    | 5   | 3      | operationType            | refer to ctc_gb_pkt_operation_type_t                                                       |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 24    | 0    | 22  | 8      | packetOffset             |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 25    | 1    | 23  | 3      | packetType               | refer to ctc_parser_pkt_type_t                                                             |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 26    | 4    | 23  | 3      | pbbSrcPortType           | {lmReceivedPacket, lmPacketType[1:0]}/{1'b0, ptpExtraOffset[1:0]}                          |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 27    | 1    | 26  | 6      | priority                 | Priority of the packet [0-63]                                                              |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 28    | 6    | 8   | 1      | rxtxFcl0                 | rxtxFcl0_0/oamUseFid/c2cCheckDisable/dmTimestamp0_0/ptpTimestamp22_22                      |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 29    | 6    | 12  | 2      | rxtxFcl2_1               | rxtxFcl2_1/wlanState[1:0]/ptpTimestamp24_23                                              |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 30    | 6    | 15  | 1      | rxtxFcl3                 | rxtxFcl3_3/wlanTunnelType/sgmacStripHeader/dmTimestamp1_1/ptpTimestamp25_25              |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 31    | 3    | 24  | 6      | rxtxFcl22_17             | rxtxFcl[22:17] / dmTimestamp[60:55] / ptpTimestamp[60:55]                                  |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 32    | 4    | 21  | 1      | sourceCfi                |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 33    | 1    | 20  | 3      | sourceCos                |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 34    | 0    | 30  | 2      | sourcePort15_14          | If sourcePort[13:9] == 5'd31, this is chipId[5:4]                                          |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 35    | 3    | 5   | 1      | sourcePortExtender       |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 36    | 4    | 26  | 6      | sourcePortIsolateId      |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 37    | 1    | 0   | 14     | sourcePort               | if sourcePort[13:9] == 5'd31, { sourcePort[15:14], sourcePort[8:6] } is chipId[4:0], sourcePort[5:0] is linkAggregationId; else sourcePort[15:14] is 0 and sourcePort[6:0] is localPhyPort[6:0]|
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 38    | 1    | 14  | 1      | srcCtagOffsetType        | srcCtagOffsetType / rxtxFcl[31] / dmTimestamp[61] / ptpTimestamp[61]; If set, ctag offset is 16 bytes; else 12 bytes |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 39    | 4    | 12  | 1      | srcCvlanIdValid          | srcCvlanIdValid / rxtxFcl[16] / dmTimestamp[46] / ptpTimestamp[54]; If set, indicate C-VLAN ID is valid |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 40    | 4    | 0   | 12     | srcCvlanId               | srcCvlanId[11:0] / isid[11:0] / dmTimestamp[45:34] / rxtxFcl[15:4] / ptpTimestamp[53:42]   |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 41    | 1    | 19  | 1      | srcQueueSelect           | Used for queue selection based on source port                                              |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 42    | 4    | 13  | 1      | srcSvlanIdValid          | If set, indicate S-VLAN ID is valid                                                        |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 43    | 2    | 20  | 12     | srcVlanId                | srcVlanId[11:0] / isid[23:12]                                                              |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 44    | 5    | 16  | 16     | srcVlanPtr               | { fromCpuLmDownDisable, ingressEditEn, outerVlanIsCVlan, srcVlanPtr[12:0] }                |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 45    | 4    | 14  | 2      | stagAction               | S-tag action                                                                               |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 46    | 4    | 22  | 1      | svlanTagOperationValid   | If set, svlan tag operation is valid                                                       |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 47    | 4    | 16  | 2      | svlanTpidIndex           |                                                                                            |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|
 | 48    | 3    | 8   | 8      | ttl                      | ttl[7:0]/rxtxFcl[30:23]/dmTimestamp[54:47]/ptpOffset[7:0]                                  |
 |-------|------|-----|--------|--------------------------|--------------------------------------------------------------------------------------------|


                                            Stacking Header
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
   |           3           |           2           |           1           |           0           |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
   |31|30|29|28|27|26|25|24|23|22|21|20|19|18|17|16|15|14|13|12|11|10|09|08|07|06|05|04|03|02|01|00|
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 0 | 8|    9   | 27  |14|XXXXXXXX|                            4 destMap                            |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 4 | 5| 1|19|             26 srcVlanPtr            |                   37 sourcePort               |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 8 |   22 priority   |   20   |13| 3|10|  2  |17|23|         32 ttl        | 0|21|       24        |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
 C |                 12 logicSrcPort               |      7 headerHash     |11|XXXXXXXX|     18    |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
10 | 6|15|                     16 nextHopPtr                   |        31 timestamp107_96         |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
14 |                                       30 timestamp95_64                                       |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
18 |                                       29 timestamp63_32                                       |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
1C |                                       28 timestamp31_0                                        |
   +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
*/

/****************************************************************************
*
* Header Files
*
****************************************************************************/
#include "sal.h"
#include "ctc_error.h"
#include "ctc_packet.h"
#include "ctc_greatbelt_packet.h"
#include "sys_greatbelt_packet.h"
#include "sys_greatbelt_chip.h"

/****************************************************************************
*
* Defines and Macros
*
*****************************************************************************/

/****************************************************************************
*
* Global and Declaration
*
*****************************************************************************/

/****************************************************************************
*
* Function
*
*****************************************************************************/

int32
ctc_greatbelt_packet_tx(uint8 lchip, ctc_pkt_tx_t* p_pkt_tx)
{
    FEATURE_SUPPORT_CHECK(lchip, CTC_FEATURE_PACKET);
    CTC_PTR_VALID_CHECK(p_pkt_tx);
    LCHIP_CHECK(lchip);

    CTC_SET_API_LCHIP(lchip, p_pkt_tx->lchip);

    CTC_ERROR_RETURN(sys_greatbelt_packet_tx(lchip, p_pkt_tx));

    return CTC_E_NONE;

}

int32
ctc_greatbelt_packet_encap(uint8 lchip, ctc_pkt_tx_t* p_pkt_tx)
{
    FEATURE_SUPPORT_CHECK(lchip, CTC_FEATURE_PACKET);
    CTC_PTR_VALID_CHECK(p_pkt_tx);
    LCHIP_CHECK(lchip);

    CTC_SET_API_LCHIP(lchip, p_pkt_tx->lchip);

    CTC_ERROR_RETURN(sys_greatbelt_packet_encap(lchip, p_pkt_tx));

    return CTC_E_NONE;

}

int32
ctc_greatbelt_packet_decap(uint8 lchip, ctc_pkt_rx_t* p_pkt_rx)
{
    FEATURE_SUPPORT_CHECK(lchip, CTC_FEATURE_PACKET);
    LCHIP_CHECK(lchip);

    CTC_ERROR_RETURN(sys_greatbelt_packet_decap(lchip, p_pkt_rx));

    return CTC_E_NONE;
}

int32
ctc_greatbelt_packet_init(uint8 lchip, void* p_global_cfg)
{
    uint8 lchip_start              = 0;
    uint8 lchip_end                = 0;
    ctc_pkt_global_cfg_t global_cfg;

    FEATURE_SUPPORT_CHECK(lchip, CTC_FEATURE_PACKET);
    LCHIP_CHECK(lchip);

    if (NULL == p_global_cfg)
    {
        sal_memset(&global_cfg, 0, sizeof(ctc_pkt_global_cfg_t));
        global_cfg.rx_cb = NULL;
        global_cfg.socket_tx_cb = NULL;
        p_global_cfg     =  &global_cfg;
    }

    CTC_FOREACH_LCHIP(lchip_start, lchip_end, 1)
    {
        CTC_ERROR_RETURN(sys_greatbelt_packet_init(lchip, p_global_cfg));
    }

    return CTC_E_NONE;

}

int32
ctc_greatbelt_packet_deinit(uint8 lchip)
{
    uint8 lchip_start = 0;
    uint8 lchip_end   = 0;

    FEATURE_SUPPORT_CHECK(lchip,CTC_FEATURE_PACKET);
    LCHIP_CHECK(lchip);
    CTC_FOREACH_LCHIP(lchip_start, lchip_end, 1)
    {
        CTC_ERROR_RETURN(sys_greatbelt_packet_deinit(lchip));
    }

    return CTC_E_NONE;
}

